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| TA1304F/N TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC TA1304F,TA1304N TV-SOUND PROCESSOR FEATURES Sound processor l l l l l l 2 ch inputs (L-ch, R-ch) 3 ch outputs (L-ch, R-ch, W-ch) Volume, balance, treble, bass and woofer level control Built-in woofer low-pass filter Input matrix circuit ALS (Automatic Level Suppressor) circuit I / O port circuit l 2 ch input ports l 2 ch output ports Weight: SSOP24-P-300-1.00: 0.33 g (Typ.) SDIP24-P-300-1.78: 1.22 g (Typ.) 000707EBA1 * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice. 2001-02-16 1/31 TA1304F/N BLOCK DIAGRAM 2001-02-16 2/31 TA1304F/N TERMINAL FUNCTION PIN No. NAME FUNCTION INTERFACE CIRCUIT 1 2 Port 1 Port 2 These are logical input terminals. Threshold voltage is 2.3 V. The input level of these terminals are 2 read by MCU through I C bus lines. 3 Port 3 A open collector type output2 controlled by MPU through I C bus lines. Maximum sink current is 1 mA. 4 Port 4 A emitter follower type output 2 controlled by MPU through I C bus lines. This terminal can 3 level output, 0 V, 2.5 V and 5 V. Maximum souce current is 2 mA, and maximum sink current is 250 A. 5 Offset cancelling filter DC offset cancelling filter for Woofer channel. Connect a capacitor (10 F) between this terminal and GND. 6 8 L-ch input R-ch input Audio input terminals. 2001-02-16 3/31 TA1304F/N PIN No. 7 GND NAME FUNCTION GND terminal. INTERFACE CIRCUIT 9 Bias filter Filter for noise rejection of the bias. Connect a capacitor (4.7 F) between this terminal and GND. 10 15 Bass LPF (R) Bass LPF (L) LPFs for bass control circuits. Connect capacitors (0.027 F) between each terminals and GND. 11 14 Treble HPF (R) Treble HPF (L) HPFs for bass control circuits. Connect capacitors (8200 pF) between each terminals and GND. 13 12 16 W-ch output R-ch output L-ch output Audio output terminals. Bass boost function, addition woofer channel signal to main channel signals, is available. Using ALS (Automatic Level Suppressor), it can reduce distortion in large signal input condition. 2001-02-16 4/31 TA1304F/N PIN No. NAME FUNCTION INTERFACE CIRCUIT 17 18 19 Woofer LPF 1 Woofer LPF 2 Woofer LPF 3 LPF for woofer. Connect a capacitor (0.033 F) between terminal 17 and GND. Connect a capacitor (0.047 F) terminal 18 and GND. Connect a capacitor (0.022 F) terminal 19 and GND. 20 VCC VCC terminal. Recommended operation voltage is 9 V 10%. 21 Volume filter Smoothing filter for volume control. Connect a capacitor (0.01 F) between this terminal and GND. 22 Woofer level filter Smoothing filter for volume control. Connect a capacitor (3.3 F) between this terminal and GND. This filter is also for ALS control. 23 SCL SCL terminal. 2001-02-16 5/31 TA1304F/N PIN No. NAME FUNCTION INTERFACE CIRCUIT 24 SDA SDA terminal. 2001-02-16 6/31 TA1304F/N I C BUS CONTROL DATA TABLE l Slave address : 80 (h) / Write mode 81 (h) / Read mode l Write mode address map SUB ADDRESS 00 01 02 TEST SW "0" : Normal "1" : Test ALS SW "0" : Off "1" : On ALS start point "00" : 180 mV "01" : 310 mV "10" : 430 mV "11" : 630 mV MSB b6 b5 b4 b3 b2 b1 LSB DEFAULT DATA 40 (h) (Bass : Center) 40 (h) (Treble : Center) 00 (h) (Volume : Min.) Input matrix "00" : Normal "01" : R-ch "10" : L-ch "11" : Reverce 00 (h) (TEST SW : Normal ALS SW : Off ALS strat point : 150 mV input att : 0 dB Input matrix : Normal) 00 (h) (Woofer level : min.) 40 (h) (Balance : Center) 20 (h) (Port3 : On Port4 : 0.0 V) Woofer LPF defeat "0" : Off "1" : On Mute 2 "0" : Off "1" : On Mute 1 "0" : Off "1" : On 10 (h) (Bass boost SW : Off Woofer LPF fo : 125 Hz Mute 1 : Off Mute 2 : Off) 2 Bass label (Effective data range : 0E (h) ~72 (h)) Treble level (Effective data range : 0E (h) ~72 (h)) Volume (Effective data range : 00 (h) ~72 (h)) Input att "0" : 0 dB "1" : -5 dB 03 04 05 Port 4 "00" : 0.0 V "01" : 2.5 V "10" : 0.0 V "11" : 5.0 V Bass boost SW "0" : On "1" : Off Woofer LPF fo "00" : 100 Hz "01" : 125 Hz "10" : 170 Hz "11" : 210 Hz Woofer level (Effective data range : 00 (h) ~72 (h)) Balance (Effective data range : 00 (h) ~7F (h)) Port 3 "0" : On "1" : Off 06 07 The bits shown gray area must be "0". 2001-02-16 7/31 TA1304F/N l Read mode address map MSB P.O.R b6 1 b5 1 b4 1 b3 1 b2 1 b1 Port 2 LSB Port 1 No function bits (shown gray area) are always "1". * P.O.R (Power on reset) "0" : After read access "1" : Power on reset Port1, 2 "0" : "High" "1" : "Low" * Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as define by Philips. 2001-02-16 8/31 TA1304F/N EXPLANATION OF THE FUNCTIONS. (Note : (h) means hexadecimal data, (b) means binary data) l Bass level (Sub address 00 (h)) Bass level control. Cross-over frequency is 1 kHz. Effective control data range is 0E (h) ~72 (h) (100steps). Set this data to 0E (h), bass level goes to minimum level, and set this data to 72 (h), bass level goes to maximum level. Set this data to 40 (h), bass level goes to center level. Switch on default data is 40 (h). Control range is 12 dB (typ.). l Treble level (Sub address 01 (h)) Treble level control. Cross-over frequency is 1 kHz. Effective control data range is 0E (h) ~72 (h) (100steps). Set this data to 0E (h), treble level goes to minimum level, and set this data to 72 (h), treble level goes to maximum level. Set this data to 40 (h), treble level goes to center level. Switch on default data is 40 (h). Control range is 12 dB (typ.). l Volume control (Sub address 02 (h)) Volume control of L-ch, R-ch, and W-ch outputs. Effective control data range is 00 (h) ~72 (h) Switch on default data is 00 (h). l Woofer level control (Sub address 04 (h)) Volume control of only W-ch output. Effective control data range is 00 (h) ~72 (h) Switch on default data is 00 (h). l Balance control (Sub address 05 (h)) Balance control. Set this data to 40 (h), balance goes to center. Effective control data range is 00 (h) ~7F (h). Switch on default data is 40 (h). l Input matrix control (Sub address 03 (h) / b1~b0) Output signal selection control. Set these bits to 00 (b), output mode goes to normal mode (input signal of terminal 6 is outputted to terminal 16, and input signal of terminal 8 is outputted to terminal 13). Set these bits to 01 (b) output mode goes to R-ch mode (input signal of terminal 8 is outputted to terminal 13 and terminal 16). Set these bits to 10 (b) output mode goes to L-ch mode (input signal of terminal 6 is outputted to terminal 13 and terminal 16). Set these bits to 11 (b), output mode goes to reverce mode (input signal of terminal 6 is outputted to terminal 13, and input signal of terminal 8 is outputted to terminal 16). Switch on default data is 00 (b). 2001-02-16 9/31 TA1304F/N l Input attenuation control (Sub address 03 (h) / b2) When this function is active, Input signals are -5 dB attenuated at input stage of L-ch and R-ch. W-ch signal isn't attenuated. So, W-ch output level is up to 8 dB from L-ch and R-ch outputs relatively. Set the bit to 0 (b), attenuation is inactive, set the bit to 1 (b), attenuation is active. Switch on default data is 0 (b). l ALS switch (Sub address 03 (h) / b6), ALS start point (Sub address 03 (h) / b5~b4) When bass boost function (addition woofer ch signal to main ch signals) is active, output signals are distort when the signals are over the dynamic range of the circuits. ALS (Automatic Level Suppressor) suppresses W-ch signal level under ALS strat point, reduces the distortion in large signals input condition. Set the bit (Sub address 03 (h) / b6) to 0 (b), ALS is inactive. Set the bit to 1 (b), ALS is active. Switch on default data is 0 (b). The bits of 03 (h) / b5~b4 set ALS start point. Set the bits to 00 (b), ALS start point is 180 mVrms. Set the bits to 01 (b), ALS start point is 310 mVrms. Set the bits to 10 (b), ALS start point is 430 mVrms. And set the bits to 11 (b), ALS start point is 630 mVrms. Switch on default data is 00 (b). l Test switch (Sub address 03 (h) / b7) This bit is for IC testing. So this bit must be set to 0 (b). Switch on default data is 0 (b). l Port 3 control (Sub address 06 (h) / b3), Port 4 control (Sub address 06 (h) / b5~b4) The IC, e.g. sound demltiplexer, which isn't avarailable I2C Bus, can be controlled by I2C Bus through TA1304F. Port 3 is open-collector type output. Set the bit to 0 (b), port3 is on. Set the bit to 1 (b), port3 is off. Switch on default data 0 (b). Port 4 is emitter-follower type output. It can output 3 levels. Set the bits to 00 (b) or 10 (b), port 4 outputs 0 V. Set to 01 (b), port 4 outputs 2.5 V. Set to 11 (b), port 4 outputs 5 V. Switch on default data is 00 (h). l Mute 1 (Sub address 07 (h) / b0), Mute 2 (Sub address 07 (h) / b1) When Mute 1 is active, all outputs are muted. Set the bit to 0 (b), Mute 1 is inactive. Set the bit to 1 (b), Mute 1 is active. Switch on default data is 0 (b). When Mute 2 is active, only W-ch output is muted. Set the bit to 0 (b), Mute 2 is inactive. Set the bit to 1 (b), Mute 2 is active. Switch on default data is 0 (b). 2001-02-16 10/31 TA1304F/N l Woofer LPF fo (Sub address 07 (h) / b5~b4) These bits set cut off frequency (fo) of the low pass filter for W-ch. Set the bits to 00 (b), fo is 100 Hz (-3 dB point). Set the bits to 01 (b), fo is 125 Hz. Set the bits to 10 (b), fo is 170 Hz. Set the bits to 11 (b), fo is 210 Hz. Switch on default data is 01 (h). l Woofer LPF defeat (Sub address 07 (h) / b3) Set the bit to 1 (b), Woofer LPF is defeated. This function is for IC testing. so, this bit must be set to 0 (b). Switch on default data is 0 (b). l Bass boost switch (Sub address 07 (h) / b7) Bass boost function is adding W-ch signal to main channel signals. It can boost low frequency signal without woofer output. Set the bit to 0 (b), Bass boost is inactive. Set the bit to 1 (b), bass boost is active. Switch on default data is 0 (b). 2001-02-16 11/31 TA1304F/N MAXIMUM RATINGS (Ta = 25C) CHARACTERISTIC Supply Voltage Power Dissipation Operating Temperature Storage Temperature Maximum Input Voltage Minimum Input voltage SYMBOL VCC PD Topr Tstg VMAX VMIN RATING 12 TA1304F: 833 (Note 1) TA1304N: 1400 (Note 2) -20~75 -55~150 VCC + 0.3 GND - 0.3 UNIT V mW C C V V Note 1: This value is on contion that the IC is mounted on PCB (50 mm x 50 mm). When using the device at Ta = 25C, decrease the power dissipation by 6.7 mW for each increase of 1C. Note 2: When using the device at Ta = 25C, decrease the power dissipation by 11.2 mW for each increase of 1C. COMMENDED SUPPLY VOLTAGE PIN No. 20 PIN NAME VCC MIN 8.1 TYP. 9.0 MAX 9.9 UNIT V ELECTRICAL CHARACTERISTICS DC current characteristics (VCC = 9.0 V, Ta = 25C) PIN No. 20 PIN NAME VCC SYMBOL ICC MIN 22 TYP. 34 MAX 45 UNIT mA DC voltage characteristics (VCC = 9.0 V, Ta = 25C) PIN No. 3 4 5 6 8 9 10 11 12 13 14 15 16 17 18 19 21 22 SYMBOL V3 V4 V5 V6 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18 V19 V21 V22 TEST CIRCUIT In power on defalt TEST CONDITION MIN 4.0 4.0 4.0 5.2 4.0 4.0 4.0 4.0 4.0 4.0 4.0 4.6 4.6 4.6 0.5 TYP. 4.5 4.5 4.5 5.7 4.5 4.5 4.5 4.5 4.5 4.5 4.5 5.1 5.1 5.1 0.0 1.5 MAX 0.5 0.5 5.0 5.0 5.0 6.2 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.6 5.6 5.6 2.0 V UNIT 2001-02-16 12/31 TA1304F/N AC CHARACTERISTICS (VCC = 9.0 V, Ta = 25C) CHARACTERISTIC SYMBOL Go L Go R GoAtt L Gain GoAtt R GoBst L GoBst R Go W THD L THD THD R THD W SN L S/N SN R SN W VNO L Residual Noise VNO R VNO W Frequency Response (100 Hz) Go100 L Go100 R Go10k L Go10k R GLPF100 LPF Frequency Response GLPF125 GLPF170 GLPF210 Balance Center Balance Minimum GLR GBLMIN L GBLMIN R GBSMAX L GBSMAX R GBSMIN L GBSMIN R GTRMAX L GTRMAX R GTRMIN L GTRMIN R GVLCNT L Volume Center GVLCNT R GVLCNT W GVLMIN L Volume Minimum GVLMIN R GVLMIN W Woofer Level Center GWLCNT TEST CIRCUIT (Note 16) -9.5 -7.5 -5.5 dB (Note 15) -65 dB (Note 14) -17 -15 -12 dB (Note 8) (Note 9) (Note 7) (Note 5) -2.0 0.0 2.0 dB (Note 4) 50 Vrms (Note 3) 70 68 (Note 2) (Note 1) TEST CONDITION MIN TYP. MAX UNIT 0.0 2.0 4.0 -7.0 -5.0 -3.0 dB 11.0 16.0 13.0 19.0 0.03 0.2 15.0 22.0 1.0 % dB Frequency Response (10 kHz) (Note 6) -2.0 4.0 5.5 4.0 1.0 -2.0 0.0 6.0 7.5 6.0 8.0 0.0 2.0 8.0 9.5 8.0 15.0 2.0 -60 dB dB dB Bass Maximum (Note 10) 10 12 14 dB Bass Minimum (Note 11) -14 -12 -10 dB Treble Maximum (Note 12) 10 12 14 dB Treble Minimum (Note 13) -14 -12 -10 dB 2001-02-16 13/31 TA1304F/N TEST CIRCUIT (Note 28) (Note 25) 1.0 V (Note 24 ) -70 dB (Note 23) 350 mV (Note 22) 5.5 3.0 7.0 4.2 (Note 21) 6.0 6.7 Vp-p (Note 20) -30 -25 (Note 19) -30 dB (Note 18) (Note 17) CHARACTERISTIC ALS Start Point 0 ALS Start Point 1 ALS Start Point 2 ALS Start Point 3 Cross Talk SYMBOL v ALS 0 v ALS 1 v ALS 2 v ALS 3 CT L-R CT R-L RR1 L TEST CONDITION MIN 142 246 341 500 TYP. 180 310 430 630 MAX 226 391 541 794 -75 UNIT mVrms dB Ripple Rejection (Volume Minimum) RR1 R RR1 W RR2 L Ripple Rejection (Volume Maximum) RR2 R RR2 W vDOUT L dB Output Dynamic Range vDOUT R vDOUT W vDIN L Input Dynamic Range vDIN R vDIN W VL Vp-p DC Offset VR VW GMUT L Mute Redsisual Level GMUT R GMUT W Port 1, 2 Low-Level Voltage VINL 1 VINL 2 VINH 1 VINH 2 V3LOW V4LOW V4MID V4HI Port 1, 2 High-Level Voltage Port 3 Low-Level Voltage Port 4 Low-Level Voltage Port 4 Medium-Level Voltage Port 4 High-level Voltage (Note 26) (Note 27) 2.0 4.5 2.5 5.0 3.5 0.5 0.5 3.0 5.5 V V V V V 2001-02-16 14/31 TA1304F/N TEST CONDITION NOTE 1 INPUT POINT TP6 TP8 MEAS. POINT TP12 TP13 TP16 00 40 BUS DATA (HEXADECIMAL) 01 02 03 04 05 06 40 72 00 / 04 72 40 * 07 10 / 90 l l l l l l l SW 1 (a) l TEST METHOD Set data of sub address 03 (h) to 00 (h) and set data of sub address 07 (h) to 10 (h). Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Measure amplitude of TP13 and TP16 (v131 mVrms, v161 mVrms). Go R dB = 20 og (v131 / 500) Go L dB = 20 og (v161 / 500) Set data of sub address 03 (h) to 04 (h). Measure amplitude of TP13 and TP16 (v132 mVrms, v162 mVrms). GoAtt R dB = 20 og (v132 / 131) GoAtt L dB = 20 og (v162 / 161) Set data of sub address 03 (h) to 00 (h) and set data of sub address 07 (h) to 10 (h). Input signal (80 Hz, 125 mVrms, sine wave) to TP6 and TP8 Measure amplitude of TP13 and TP16 (v133 mVrms, v163 mVrms). Set data of sub address 07 (h) to 90 (h). Measure amplitude of TP13 and TP16 (v134 mVrms, v164 mVrms). GoBst R dB = 20 og (v134 / 133) GoBst L dB = 20 og (v164 / 163) Measure amplitude of TP12 (v12 mVrms). Go W dB = 20 og (v12 / 125) Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8 Measure THD of TP13 and TP16 (THD R %, THD L %). Input signal (80 Hz, 125 mVrms, sine wave) to TP6 and TP8. Measure THD of TP12 (THD W %) l l l l l l l 2 00 * 10 l l l l *: Don't care 2001-02-16 15/31 TA1304F/N INPUT POINT TP6 TP8 MEAS. POINT TP12 TP13 TP16 BUS DATA (HEXADECIMAL) 01 02 03 04 05 06 40 72 00 72 40 * NOTE 3 00 40 07 10 SW 1 (a) l l l l l l l l l l TEST METHOD Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8 Measure amplitude of TP13 and TP16 (v13s mVrms, v16s mVrms). Connect TP6 and TP8 to GND. Measure amplitude of TP13 and TP16 (v13n mVrms, v16n mVrms). SN R dB = 20 og (v13s / v13n) SN L dB = 20 og (v16s / v16n) Input signal (80 Hz, 125 mVrms, sine wave) to TP6 and TP8. Measure amplitude of TP12 (v12s mVrms). Connect TP6 and TP8 to GND. Measure amplitude of TP12 (v12n mVrms). SN W dB = 20 og (v12s / v12n) Connect TP6 and TP8 to GND. Measure amplitude of TP12, TP13 and TP16 (vNO W Vrms, vNO R Vrms, vNO L Vrms). Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Measure amplitude of TP13 and TP16 (v13o mVrms, v16o mVrms). Input signal (100 Hz, 500 mVrms, sine wave) to TP6 and TP8 Measure amplitude of TP13 and TP16(v13 mVrms, v16 mVrms). Go100 R dB = 20 og (v13 / v13o) Go100 L dB = 20 og (v16 / v16o) Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Measure amplitude of TP13 and TP16 (v13o mVrms, v16o mVrms). Input signal (10 kHz, 500 mVrms, sine wave) to TP6 and TP8. Measure amplitude of TP13 and TP16 (v13 mVrms, v16 mVrms). Go10k R dB = 20 og (v13 / v13o) Go10k L dB = 20 og (v16 / v16o) 4 00 00 * l l 5 TP6 TP8 TP12 TP13 72 72 * l l l l l 6 * l l l l l *: Don't care 2001-02-16 16/31 TA1304F/N INPUT MEAS. POINT POINT TP6 TP8 TP12 BUS DATA (HEXADECIMAL) 01 02 03 04 05 06 40 72 00 72 40 * NOTE 7 00 40 07 00 / 10 / 20 / 30 / 14 SW 1 (a) l l l l l l l l l l l l TEST METHOD Input signal (300 Hz, 125 mVrms, sine wave) to TP6 and TP8. Set data of sub address 07 (h) to 00 (h). Measure amplitude of TP12 (v120 mVrms). Set data of sub address 07 (h) to 10 (h) Measure amplitude of TP12 (v121 mVrms). Set data of sub address 07 (h) to 20 (h) Measure amplitude of TP12 (v122 mVrms). Set data of sub address 07 (h) to 30 (h). Measure amplitude of TP12 (v123 mVrms). Set data of sub address 07 (h) to 14 (h). Measure amplitude of TP12 (v12x mVrms). GLPF80 dB = 20 og (v120 / v121) GLPF100 dB = 20 og (v121 / v122) GLPF130 dB = 20 og (v122 / v123) GLPF160 dB = 20 og (v123 / v12x) l l l 8 TP13 TP16 * 10 Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Measure amplitude of TP13 and TP16 (v13 mVrms, v16 mVrms). GLR dB = 20 og (v16 / v13) *: Don't care 2001-02-16 17/31 TA1304F/N INPUT POINT TP6 TP8 MEAS. POINT TP13 TP16 BUS DATA (HEXADECIMAL) 01 02 03 04 05 06 40 72 00 72 0E / 72 * NOTE 9 00 40 07 10 SW 1 (a) l l l l l l TEST METHOD Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Set data of sub address 05 (h) to 0E (h). measure amplitude of TP13 and TP16 (v13R mVrms, v16R mVrms). Set data of sub address 05 (h) to 72 (h). Measure amplitude of TP13 and TP16 (v13L mVrms, v16L mVrms). GBLMIN R dB = 20 og (v13R / v16R) GBLMIN N L dB = 20 og (v16L / v13L) Input signal (100 Hz, 250 mVrms, sine wave) to TP6 and TP8. Set data of sub address 00 (h) to 40 (h). Measure amplitude of TP13 and TP16 (v13o mVrms, v16o mVrms). Set data of sub address 00 (h) to 72 (h). Measure amplitude of TP13 and TP16 (v13B mVrms, v16B mVrms). GBSMAX R dB = 20 og (v13B / v13o) GBSMAX L dB = 20 og (v16B / v16o) Input signal (100 Hz, 250 mVrms, sine wave) to TP6 and TP8. Set data of sub address 00 (h) to 40 (h). Measure amplitude of TP13 and TP16 (v13o mVrms, v16o mVrms). Set data of sub address 00 (h) to 0E (h). Measure amplitude of TP13 and TP16 (v13B mVrms, v16B mVrms). GBSMIN R dB = 20 og (v13B / v13o) GBSMIN L dB = 20 og (v16B / v16o) 10 40 / 72 40 * l l l l l l 11 40 / 0E * l l l l l l *: Don't care 2001-02-16 18/31 TA1304F/N NOTE 12 INPUT POINT TP6 TP8 MEAS. POINT TP13 TP16 BUS DATA (HEXADECIMAL) 01 02 03 04 05 06 40 / 27 72 00 72 40 * SW 1 (a) l l l l l l 13 40 / 0E * l l l l l l TEST METHOD Input signal (10 kHz, 250 mVrms, sine wave) to TP6 and TP8. Set data of sub address 01 (h) to 40 (h). Measure amplitude of TP13 and TP16 (v13o mVrms, v16o mVrms). Set data of sub address 01 (h) to 72 (h). Measure amplitude of TP13 and TP16 (v13T mVrms, v16T mVrms). GTRMAX R dB = 20 og (v13T / v13o) GTRMAX L dB = 20 og (v16T / v16o) Input signal (10 kHz, 250 mVrms, sine wave) to TP6 and TP8. Set data of sub address 01 (h) to 40 (h). Measure amplitude of TP13 and TP16 (v13o mVrms, v16o mVrms). Set data of sub address 01 (h) to 0E (h). Measure amplitude of TP13 and TP16 (v13T mVrms, v16T mVrms). GTRMIN R dB = 20 og (v13T / v13o) GTRMIN L dB = 20 og (v16T / v16o) 00 40 07 10 *: Don't care 2001-02-16 19/31 TA1304F/N INPUT POINT TP6 TP8 MEAS. POINT TP12 TP13 TP16 BUS DATA (HEXADECIMAL) 01 02 03 04 05 06 40 72 / 40 00 72 40 * NOTE 14 00 40 07 10 SW 1 (a) l l l l l l l l l l l l TEST METHOD Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Set data of sub address 02 (h) to 72 (h). Measure amplitude of TP13 and TP16 (v13o mVrms, v16o mVrms). Set data of sub address 02 (h) to 40 (h). measure amplitude of TP13 and TP16 (v13C mVrms, v16C mVrms). GVLCNT R dB = 20 og (v13C / v13o) GVLCNT L dB = 20 og (v16C / v16o) Input signal (80 Hz, 125 mVrms, sine wave) to TP6 and TP8 Set data of sub address 02 (h) to 72 (h). Measure amplitude of TP12 (v12o mVrms). Set data of sub address 02 (h) to 40 (h). Measure amplitude of TP12 (v12C mVrms). GVLCNT W dB = 20 og (v12C / v12o) *: Don't care 2001-02-16 20/31 TA1304F/N INPUT POINT TP6 TP8 MEAS. POINT TP12 TP13 TP16 BUS DATA (HEXADECIMAL) 01 02 03 04 05 06 40 72 / 0E 00 72 40 * NOTE 15 00 40 07 10 SW 1 (a) l l l l l TEST METHOD Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Set data of sub address 02 (h) to 72 (h). Measure amplitude of TP13 and TP16 (v13o mVrms, v16o mVrms). Set data of sub address 02 (h) to 0E (h). measure amplitude of TP13 and TP16 (v13MIN mVrms, v16MIN mVrms). GVLMIN R dB = 20 og (v13MIN / v13o) GVLMIN L dB = 20 og (v16MIN / v16o) Input signal (80 Hz, 125 mVrms, sine wave) to TP6 and TP8 Set data of sub address 02 (h) to 72 (h). Measure amplitude of TP12 (v12o mVrms). Set data of sub address 02 (h) to 0E (h). measure amplitude of TP12 (v12MIN mVrms). GVLMIN W dB = 20 og (v12MIN / v12o) Input signal (80 Hz, 125 mVrms, sine wave) to TP6 and TP8 Set data of sub address 04 (h) to 72 (h) Measure amplitude of TP12 (v12o mVrms). Set data of sub address 04 (h) to 40 (h). Measure amplitude of TP12 (v12C mVrms). GWLCNT dB = 20 og (v12C / v12o) l l l l l l l 16 TP12 72 72 / 40 * l l l l l l *: Don't care 2001-02-16 21/31 TA1304F/N INPUT POINT TP6 TP8 MEAS. POINT TP12 BUS DATA (HEXADECIMAL) 01 02 03 04 05 06 40 72 40 / 50 / 60 / 70 l l l l l l 18 TP13 TP16 00 * l l l l l l l l l l 19 TP12 TP13 TP16 l 00 00 * (b) l 72 40 * NOTE 17 00 40 07 10 SW 1 (a) l l l TEST METHOD Input signal (80 Hz, 500 mVrms, sine wave) to TP6 and TP8 Set data of sub address 03 (h) to C0 (h). Measure amplitude of TP12 (VALS 0 Vp-p). Set data of sub address 03 (h) to D0 (h). Measure amplitude of TP12 (VALS 1 Vp-p). Set data of sub address 03 (h) to E0 (h). Measure amplitude of TP12 (VALS 2 Vp-p). Set data of sub address 03 (h) to F0 (h). Measure amplitude of TP12 (VALS 3 Vp-p). Connect TP8 to GND. Input signal (1 kHz, 500 mVrms, sine wave) to TP6. Measure 1 kHz spectrum of TP16 output (vTP16 dBV). Measure 1 kHz spectrum of TP13 output (vTP13 dBV). CT L-R dB = vTP16 - vTP13 Connect TP6 to GND. Input signal (1 kHz, 500 mVrms, sine wave) to TP8. Measure 1 kHz spectrum of TP13 output (vTP13 dBV). Measure 1 kHz spectrum of TP16 output (vTP16 dBV). CT R-L dB = vTP13 - vTP16 Apply 9.0 V DC and sine wave (60 Hz, 500 mVrms) to VCC terminal. Measure amplitude of TP12, TP13 and TP16 (vTP12 mVrms, vTP13 mVrms, vTP16 mVrms). RR1 W dB = 20 og (vTP12 / 500) RR1 R dB = 20 og (vTP13 / 500) RR1 L dB = 20 og (vTP16 / 500) l *: Don't care 2001-02-16 22/31 TA1304F/N INPUT POINT MEAS. POINT TP12 TP13 TP16 l BUS DATA (HEXADECIMAL) 01 02 03 04 05 06 40 72 00 72 40 * NOTE 20 00 40 07 10 SW 1 (b) l TEST METHOD Apply 9.0 V DC and sine wave (60 Hz, 500 mVrms) to VCC terminal. Measure amplitude of TP12, TP13 and TP16 (vTP12 mVrms, vTP13 mVrms, vTP16 mVrms). RR1 W dB = 20 og (vTP12 / 500) RR1 R dB = 20 og (vTP13 / 500) RR1 L dB = 20 og (vTP16 / 500) Input signal (100 Hz, sine wave) to TP6 and TP8. Increase amplitude of the input signal, and measure THD of TP13 and TP16. Measure amplitude of TP13 and TP16 when THD of the output is 1% (vDOUT R1 Vp-p, vOUT L1 Vp-p). Input signal (10 kHz, sine wave) to TP6 and TP8. Increase amplitude of the input signal, and measure THD of TP13 and TP16. Measure amplitude of TP13 and TP16 when THD of the output is 1% (vDOUT R2 Vp-p, vDOUT L2 Vp-p). Smaller value vDOUT R1 or vDOUT R2 is vDOUT R. Smaller value vDOUT L1 or vDOUT L2 is vDOUT L. Input signal (80 Hz, sine wave) to TP6 and TP8. Increase amplitude of the input signal, and measure THD of TP12. Measure amplitude of TP12 when THD of the output is 1% (vDOUT W Vp-p). l 21 TP6 TP8 TP12 TP13 TP16 72 72 * (a) l l l l l l l l l l *: Don't care 2001-02-16 23/31 TA1304F/N INPUT POINT TP6 TP8 MEAS. POINT TP12 TP13 TP16 BUS DATA (HEXADECIMAL) 02 03 04 05 06 40 00 40 40 * NOTE 22 00 40 01 40 07 10 SW 1 (a) l l TEST METHOD Input signal (1 kHz, sine wave) to TP6 and TP8. Increase amplitude of the input signal, and measure THD of TP13 and TP16. Measure amplitude of TP13 and TP16 when THD of the output is 1% (vDIN R Vp-p, vDIN L Vp-p). Input signal (80 Hz, sine wave) to TP6 and TP8. Increase amplitude of the input signal, and measure THD of TP13 and TP16. Measure amplitude of TP13 and TP16 when THD of the output is 1% (vDIN W Vp-p). Connect TP6 and TP8 to GND. Change data of sub address 03 (h) to 00 (h) ~03 (h). Change data of sub address 07 (h) to 00 (h), 01 (h) and 02 (h). Measure DC off set of TP12, TP13, TP16 (V R mV, V L mV, V W mV). l l l l 23 72 00~03 72 * 00 / 01 / 02 l l l l *: Don't care 2001-02-16 24/31 TA1304F/N INPUT POINT TP6 TP8 MEAS. POINT TP12 TP13 TP16 BUS DATA (HEXADECIMAL) 01 02 03 04 05 06 40 72 00 72 40 * NOTE 24 00 40 07 00 / 01 / 02 SW 1 (a) l l l l l TEST METHOD Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Set data of sub address 07 (h) to 00 (h). Measure amplitude of TP13 and TP16 (v13o mVrms. v16o mVrms). Set data of sub address 07 (h) to 01 (h). Measure amplitude of TP13 and TP16 (v13MUT mVrms, v16MUT mVrms). GMUT R dB = 20 og (v13MUT / v13o) GMUT L dB = 20 og (v16MUT / v16o) Input signal (80 Hz, 125 mVrms, sine wave) to TP6 and TP8. Set data of sub address 07 (h) to 00 (h). Measure amplitude of TP12 (v12o mVrms). Set data of sub address 07 (h) to 01 (h). Measure amplitude of TP12 (v12MUT mVrms). GMUT W dB = 20 og (v12MUT / v12o) Apply 5 V to TP1 and TP2. Decrease voltage of TP1, and read 2 IC status by I C Bus. Measure voltage of TP1 when IC status is changed 00 (h) to 01 (h) (VINL 1 V). Apply 5 V to TP1 and TP2. Decrease voltage of TP2, and read 2 IC status by I C Bus. Measure voltage of TP1 when IC status is changed 00 (h) to 02 (h) (VINL 2 V). l l l l l l l 25 TP1 TP2 * * * * * * * l l l l l l *: Don't care 2001-02-16 25/31 TA1304F/N INPUT POINT TP1 TP2 MEAS. POINT BUS DATA (HEXADECIMAL) 01 02 03 04 05 06 * * 00 * * * NOTE 26 00 * 07 * SW 1 (a) l l l TEST METHOD Apply 0 V to TP1 and apply 5 V to TP2. Increase voltage of TP1, and 2 read IC status by I C Bus. Measure voltage of TP1 when IC status is changed 01 (h) to 00 (h) (VINH 1 V). Apply 5 V to TP1 and apply 0 V to TP2. Increase voltage of TP1, and 2 read IC status by I C Bus. Measure voltage of TP1 when IC status is changed 02 (h) to 00 (h) (VINH 2 V). Measure voltage of TP3 (V3LOW V). Set data of 06 (h) to 00 (h). Measure voltage of TP4 (V4LOW V). Set data of 06 (h) to 10 (h). Measure voltage of TP4 (V4MID V). Set data of 06 (h) to 30 (h). Measure voltage of TP4 (V4HI V). l l l 27 28 TP3 TP4 * * * * * * * 00 * * * * 04 00 / 10 / 30 * * l l l l l l l *: Don't care 2001-02-16 26/31 TA1304F/N DC TEST CIRCUIT 2001-02-16 27/31 TA1304F/N AC TEST CIRCUIT 2001-02-16 28/31 TA1304F/N APPLICATION CIRCUIT 2001-02-16 29/31 TA1304F/N PACKAGE DIMENSIONS Weight: 0.33 g (Typ.) 2001-02-16 30/31 TA1304F/N PACKAGE DIMENSIONS Weight: 1.22 g (Typ.) 2001-02-16 31/31 |
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